Chapter 2: Getting Started
2–9
MegaWizard Plug-In Manager Flow
1. Create a custom MegaCore function variation as described earlier in this chapter
but ensure you specify your variation name to match the Quartus II project name.
2. Verify that the absolute path to your third-party EDA tool is set in the Options
page under the Tools menu in the Quartus II software.
3. On the Processing menu, point to Start and click Start Analysis & Elaboration .
4. On the Tools menu, click Tcl scripts . In the Tcl Scripts dialog box, select
< variation name >_nativelink.tcl and click Run . Check for a message confirming
that the Tcl script was successfully loaded.
5. On the Assignments menu, click Settings , expand EDA Tool Settings , and select
Simulation . Select a simulator under Tool name then in NativeLink Settings ,
select Compile test bench and click Test Benches .
6. On the Tools menu, point to EDA Simulation Tool and click Run EDA RTL
Simulation .
The Quartus II software selects the simulator, and compiles the Altera libraries,
design files, and testbenches. The testbench runs and the waveform window
shows the design signals for analysis.
f For more information, refer to the Simulating Altera Designs chapter in volume 3 of th e
Quartus II Handbook.
Simulating the Design in ModelSim
To simulate your design with the MegaWizard-generated ModelSim Tcl script, change
your ModelSim working directory to the project directory specified in “Selecting the
MegaCore Function” on page 2–3 , and run the MegaWizard-generated Tcl script.
If you selected VHDL as your functional simulation language, run the Tcl script
< variation_name >_vho_msim.tcl .
If you selected Verilog HDL as your functional simulation language, run the Tcl
script < variation_name >_vo_msim.tcl .
1
The Tcl script creates a ModelSim project, maps the libraries, compiles the
top-level design and associated testbench, and then outputs the simulation
results to the waveform viewer.
Compile the Design and Program a Device
You can use the Quartus II software to compile your design.
To compile your design, follow these steps:
1. If you are using the Quartus II software to synthesize your design, skip to Step 3 .
November 2013
Altera Corporation
NCO MegaCore Function
User Guide
相关PDF资料
IP-NIOS IP NIOS II MEGACORE
IP-PCI/MT64 IP PCI 64BIT MASTER/TARGET
IP-PCIE/8 IP PCI EXPRESS, X8
IP-POSPHY4 IP POS-PHY L4
IP-RIOPHY IP RAPID I/O
IP-RLDRAMII IP RLDRAM II CONTROLLER
IP-RSDEC IP REED-SOLOMON DECODER
IP-SDI IP VIDEO INTERFACE - SDI
相关代理商/技术参数
IP-NIOS 功能描述:开发软件 Nios II MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IPO-002-VSF-LF 制造商:PROXISTOR AB ELECTRONIC 功能描述:PROXIMITY SWITCH, PNP; Sensor Input:Inductive; Sensing Range Max:2mm; Supply Voltage DC Min:10V; Supply Voltage DC Max:30V; SVHC:No SVHC (19-Dec-2012); External Depth:10.5mm; External Length / Height:16.5mm; External Width:30mm;
IPOD TOUCH4-C-B 制造商:Distributed By MCM 功能描述:Apple® iPod Black Touch 4th Gen Digitizer + Glass 制造商:Distributed By MCM 功能描述:APPLE IPOD TOUCH DIGITIZER BLACK
IPOD TOUCH4-C-W 制造商:Distributed By MCM 功能描述:APPLE IPOD TOUCH DIGITIZER WHITE 制造商:Distributed By MCM 功能描述:Apple® iPod White Touch 4th Gen Digitizer + Glass
IPP015N04N G 功能描述:MOSFET OptiMOS 3 PWR TRANST 40V 120A RoHS:否 制造商:STMicroelectronics 晶体管极性:N-Channel 汲极/源极击穿电压:650 V 闸/源击穿电压:25 V 漏极连续电流:130 A 电阻汲极/源极 RDS(导通):0.014 Ohms 配置:Single 最大工作温度: 安装风格:Through Hole 封装 / 箱体:Max247 封装:Tube
IPP015N04NG 制造商:Infineon Technologies AG 功能描述:
IPP015N04NGHKSA1 制造商:Infineon Technologies AG 功能描述:Trans MOSFET N-CH 40V 120A 3-Pin(3+Tab) TO-220 制造商:Infineon Technologies AG 功能描述:N-KANAL POWER MOS - Rail/Tube
IPP015N04NGXKSA1 制造商:Infineon Technologies AG 功能描述:Trans MOSFET N-CH 40V 120A 3-Pin(3+Tab) TO-220 制造商:Infineon Technologies AG 功能描述:N-KANAL POWER MOS - Rail/Tube 制造商:Infineon Technologies AG 功能描述:MOSFET N-CH 40V 120A TO220-3